Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-01-22
2010-10-12
Chase, Shelly A (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S809000
Reexamination Certificate
active
07814394
ABSTRACT:
A Post-Viterbi processor generates a plurality of candidate codewords based on a plurality of dominant error patterns for a particular communication channel. The Post-Viterbi processor selects one among the candidate codewords as a corrected codeword upon determining that the candidate codeword is error free.
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Park et al., High rate error correcting codes targeting dominant error patterns, Oct. 2006, IEEE, Trans on Magnetics, vol. 42, No. 10, p. 2573-2575.
Park et al., Imposing a k Constraint in Recording Systems Employing Post-Viterbi Error Correction, IEEE Transactions on Magnetics, Oct. 2005, pp. 2995-2997, vol. 41, No. 10.
Lee Jun
Sugawara Takao
Chase Shelly A
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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