Method for simultaneously manufacturing semiconductor devices

Details Method for simultaneously manufacturing semiconductor devices Method for simultaneously manufacturing semiconductor devices

2008-12-18

2010-11-16

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21179

Reexamination Certificate

active

07833859

ABSTRACT:
Methods for manufacturing semiconductor devices simultaneously to implement low-voltage and high-voltage devices in a single chip. In one example embodiment, a method includes various acts. An isolation layer is formed on a wafer. A gate oxide layer and a lower gate poly are sequentially formed on a first low-voltage transistor region. A first poly oxide layer is formed. A nitride layer is formed on the first poly oxide layer. The nitride layer and the first poly oxide layer are etched. A field oxide layer is formed by selectively oxidizing portions exposed by the etching. A second poly oxide layer is formed. Gate patterns of each transistor region are completed by vapor-depositing an upper gate poly on a high-voltage transistor region, the first low-voltage transistor region and a second low-voltage transistor region. A source and drain region are formed.

REFERENCES:
patent: 5225700 (1993-07-01), Smayling
patent: 6815794 (2004-11-01), Shin et al.

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