Transistor having an embedded tensile strain layer with...

Details Transistor having an embedded tensile strain layer with... Transistor having an embedded tensile strain layer with...

2006-12-05

2010-02-09

Tran, Long K (Department: 2818)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

C438S365000, C438S514000, C257S061000, C257SE21316, C257SE33004

Reexamination Certificate

active

07659213

ABSTRACT:
By incorporating carbon by means of ion implantation and a subsequent flash-based or laser-based anneal process, strained silicon/carbon material with tensile strain may be positioned in close proximity to the channel region, thereby enhancing the strain-inducing mechanism. The carbon implantation may be preceded by a pre-amorphization implantation, for instance on the basis of silicon. Moreover, by removing a spacer structure used for forming deep drain and source regions, the degree of lateral offset of the strained silicon/carbon material with respect to the gate electrode may be determined substantially independently from other process requirements. Moreover, an additional sidewall spacer used for forming metal silicide regions may be provided with reduced permittivity, thereby additionally contributing to an overall performance enhancement.

REFERENCES:
patent: 4751193 (1988-06-01), Myrick
patent: 6074937 (2000-06-01), Pramanick et al.
patent: 2004/0173815 (2004-09-01), Yeo et al.
patent: 2004/0235280 (2004-11-01), Keys et al.
patent: 2006/0003561 (2006-01-01), Goktepeli
patent: 2006/0088969 (2006-04-01), Jain
patent: 2007/0281413 (2007-12-01), Li et al.
Translated German office action dated Mar. 1, 2007.

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