Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-11-09
2010-12-14
Nguyen, Dao H (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S259000, C438S270000, C438S700000, C257S019000, C257S288000, C257S615000, C257SE21223, C257SE21335, C257SE21431
Reexamination Certificate
active
07851313
ABSTRACT:
A semiconductor process for improved etch control in which an anisotropic selective etch is used to better control the shape and depth of trenches formed within a semiconductor material. The etchants exhibit preferential etching along at least one of the crystallographic directions, but exhibit an etch rate that is much slower in a second crystallographic direction. As such, one dimension of the etching process is time controlled, a second dimension of the etching process is self-aligned using sidewall spacers of the gate stack, and a third dimension of the etching process is inherently controlled by the selective etch phenomenon of the selective etchant along the second crystallographic direction. A deeper trench is implemented by first forming a lightly doped drain (LDD) region under the gate stack and using the sidewall spacers in combination with the LDD regions to deepen the trenches formed within the semiconductor material.
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Luo Yuhao
Nayak Deepak Kumar
George Thomas
Nguyen Dao H
Wallace Michael T.
Xilinx , Inc.
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