Pattern data verification method for semiconductor device,...

Details Pattern data verification method for semiconductor device,... Pattern data verification method for semiconductor device,...

2007-05-16

2010-06-01

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07730445

ABSTRACT:
A pattern data verification method for a semiconductor device, including extracting, from design data, design data corresponding to an edge portion of a mask pattern to obtain an edge portion of a pattern on a substrate to be processed, when the pattern is obtained on the substrate to be processed by using at least two masks each having the mask pattern corresponding to the design data, setting allowable errors with respect to the extracted design data and the design data which is not extracted, respectively, calculating a pattern formed on the substrate to be processed by using at least one mask by process simulation, and comparing an error between the pattern calculated by the simulation and the design data with the allowable error set for the design data.

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David M. Newmark et al., “Large Area Optical Proximity Correction Using Pattern Based Corrections”, SPIE vol. 2322, Photomask Technology and Management, pp. 374-386, 1994.

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