Method for forming fully silicided gate electrodes and...

Details Method for forming fully silicided gate electrodes and... Method for forming fully silicided gate electrodes and...

2005-10-18

2009-11-24

Blum, David S (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

07622345

ABSTRACT:
A method is disclosed for forming silicided gate electrodes and unsilicided poly resistors. After patterning a semiconductor material for the gate electrode and resistor structures, a first dielectric layer is used to protect a poly resistor that is not to be silicided, then a first silicidation is performed for partially siliciding the gate electrode of the transistor. If the gate electrode is thick, a second dielectric layer is used to protect the resistor that is not to be silicided, then a second silicidation is performed for fully siliciding the gate electrode.

REFERENCES:
patent: 4877755 (1989-10-01), Rodder
patent: 5909617 (1999-06-01), Manning et al.
patent: 6100173 (2000-08-01), Gardner et al.
patent: 6211000 (2001-04-01), Spikes et al.
patent: 6365481 (2002-04-01), Bonser et al.
patent: 6406956 (2002-06-01), Tsai et al.
patent: 6562718 (2003-05-01), Xiang et al.
patent: 7414292 (2008-08-01), Ema et al.
patent: 2002/0119631 (2002-08-01), Tseng
patent: 2002/0127791 (2002-09-01), Nanjo et al.
patent: 2004/0097032 (2004-05-01), Yamanoue et al.
patent: 2005/0227440 (2005-10-01), Ema et al.
patent: 2008/0280406 (2008-11-01), Ema et al.
patent: 2001-250869 (2001-09-01), None
patent: WO 2004/112139 (2004-12-01), None
B. Tavel et al., “Totally Silicided (CoSi2) Polysilicon: a novel approach to very low-reisistive gate (˜2/Ω▭) without metal CMP nor etching”, 2001 IEEE, pp. IEDM 01-825-IEDM 828.
Z. Krivokapic et al., “Nickel Silicide Metal Gate FDSOI Devices with Improved Gate Oxide Leakage”, 2002 IEEE, pp. IEDM 271-IEDM 274.
J. Kedzierski et al, “Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation”, 2002 IEEE, pp. IEDM 247-IEDM 250.
Singapore Search Report. Issued by the Danish Patent & Trademark Office in related Application No. 200508500-6. Mailing date Nov. 26, 2008.
B. Tavel et al. “Totally Silicided (CoSi2) Poysilicon: a novel approach to very low-resistive gate (˜2OHM) without metal CMP nor etching.” 2001, pp. 37.5.1-37.5.4, IEEE.
Singapore Search Report dated Nov. 26, 2008 regarding SG Patent Application No. 200508500-6 dated Oct. 25, 2005. SG.
CN Office Action dated Aug. 1, 2008 regarding CN Publication No. 2001-250869. CN.
CN Office Action dated May 22, 2009. CN.
ULSI Technology, Y.S. Chang et al. Book Publisher: McGraw-Hill Education, p. 396. ISBN No. 0-07-114105-7.

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