Method of fabricating non-volatile memory

Details Method of fabricating non-volatile memory Method of fabricating non-volatile memory

2007-01-08

2009-02-03

Le, Thao P. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21680

Reexamination Certificate

active

07485529

ABSTRACT:
A method of fabricating a non-volatile memory is described. A substrate having stacked gate structures thereon is provided. Each stacked gate structure includes a select gate dielectric layer, a select gate and a cap layer. A source region and a drain region are formed in the substrate. The source region and the drain region are separated from each other by at least two stacked gate structures. A tunneling dielectric layer is formed over the substrate and then a first conductive layer is formed over the tunneling dielectric layer. The first conductive layer is patterned to form floating gates in the gaps between the stacked gate structures. After forming an inter-gate dielectric layer over the substrate, a second conductive layer is formed over the substrate. The second conductive layer is patterned to form mutually linked control gates in the gaps between neighboring stacked gate structures.

REFERENCES:
patent: 2005/0087794 (2005-04-01), Chen et al.
patent: 2006/0040440 (2006-02-01), Chen et al.

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