Method of fabricating flash memory device with increased...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S264000, C257S315000, C257S314000, C257SE21422, C257SE29300

Reexamination Certificate

active

07618863

ABSTRACT:
A method of fabricating a flash memory which increases a coupling ratio between a floating gate and a control gate in a cell. The method comprises sequentially forming a tunnel oxide film, and polysilicon and first insulation films for a floating gate on an active area of a semiconductor substrate; forming a photoresist as a mask on the first insulation film, and performing an etching process using the photoresist as the mask; forming a hard mask by depositing a second insulation film for prevention of oxidation on the semiconductor substrate; forming an STI by using the hard mask; oxidizing sidewalls of the STI and gap-filling the STI; forming a floating gate by removing the second insulation film remaining as the hard mask; and sequentially forming an ONO film and a control gate on the floating gate.

REFERENCES:
patent: 2002/0187609 (2002-12-01), Kim et al.
patent: 2003/0054608 (2003-03-01), Tseng et al.

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