Semiconductor structure with reduced gate doping and methods...

Details Semiconductor structure with reduced gate doping and methods... Semiconductor structure with reduced gate doping and methods...

2005-10-26

2009-02-10

Tran, Minh-Loan T (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S217000, C438S229000, C438S527000, C438S528000

Reexamination Certificate

active

07488635

ABSTRACT:
A semiconductor structure includes a substrate having a memory region and a logic region. A first p-type device is formed in the memory region and a second p-type device is formed in the logic region. At least a portion of a semiconductor gate of the first p-type device has a lower p-type dopant concentration than at least a portion of a semiconductor gate of the second p-type device. The semiconductor gates of the first and second p-type devices each have a non-zero p-type dopant concentration.

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