Stack-type semiconductor device having cooling path on its...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents

Reexamination Certificate

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C257S686000, C257SE23097

Reexamination Certificate

active

07626260

ABSTRACT:
Provided is a semiconductor device having a cooling path on its bottom surface. The stack-type semiconductor device having a cooling path comprises a stack-type semiconductor chip comprising a first semiconductor chip and a second semiconductor chip. The first semiconductor chip comprises a first surface in which a circuit unit is formed and a second surface in which a first cooling path is formed, and the second semiconductor chip comprises a first surface in which a circuit unit is formed and a second surface in which a second cooling path is formed. The second surface of the first semiconductor chip and the second surface of the second semiconductor chip are bonded to each other, and a third cooling path is formed in the middle of the stack-type semiconductor chip using the first and second cooling paths. Warpage of the stack-type semiconductor device is suppressed and heat is easily dissipated.

REFERENCES:
patent: 6219237 (2001-04-01), Geusic et al.
patent: 6577013 (2003-06-01), Glenn et al.
patent: 2003/0006494 (2003-01-01), Lee et al.
patent: 2004/0145044 (2004-07-01), Sugaya et al.
patent: 2003-078106 (2003-03-01), None
patent: 2004-0083985 (2004-10-01), None
patent: 2005-0037679 (2005-04-01), None
English language abstract of Japanese Publication No. 2003-078106, Mar. 14, 2003.
English language abstract of Korean Publication No. 2004-0083985, Oct. 6, 2004.
English language abstract of Korean Publication No. 2005-0037679, Apr. 25, 2005.

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