Integrated CMOS and bipolar devices method and structure

Details Integrated CMOS and bipolar devices method and structure Integrated CMOS and bipolar devices method and structure

2006-06-15

2009-12-29

Coleman, W. David (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21696, C257SE27015

Reexamination Certificate

active

07638386

ABSTRACT:
A method is provided for forming bipolar (103) and MOS (105) semiconductor devices in a common substrate (46), comprising, forming a combination comprising an MOS device (105) in a first region (44) of the substrate (46) and a portion (50) of a collector region (82, 64, 62, 50) of the bipolar device (103) in a second portion (42) of the substrate (46), covering the MOS device (105) with differentially etchable dielectric layers (56, 58) and the combination with an etch-stop layer (68), completing formation of the bipolar device (103) without completely removing the etch-stop layer (68) from the MOS device (105), anisotropically etching the differentially etchable layers (56, 58) to form a gate sidewall (56′, 58′) of the MOS device (105), and applying contact electrodes (98) to the MOS (105) and bipolar (103) devices. One or more dielectric isolation regions (47, 49) are desirably provided as a part of the combination for laterally isolating the MOS (105) and bipolar (103) devices and separating the collector (983, 50) and base (982, 70′) contacts of the bipolar device (103).

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