Static random-access memory having reduced bit line...

Details Static random-access memory having reduced bit line... Static random-access memory having reduced bit line...

2005-06-02

2009-08-04

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S154000, C365S185250

Reexamination Certificate

active

07570527

ABSTRACT:
A bit line precharge circuit, a method of precharging a bit line and an SRAM device incorporating the circuit or the method. In one embodiment, the bit line precharge circuit includes: (1) a word line driver coupled to word lines of the SRAM array and configured to operate at a word line driver voltage and (2) a bit line precharge circuit coupled to bit lines of the SRAM array and configured to precharge the bit lines to a precharge voltage substantially lower than the word line driver voltage.

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patent: 2004/0001378 (2004-01-01), Madan et al.
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patent: 2004/0159905 (2004-08-01), Sato
patent: 2005/0162894 (2005-07-01), Itoh et al.

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