Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-01-29
2009-08-25
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S317000, C257SE29300
Reexamination Certificate
active
07579238
ABSTRACT:
In making a multi-bit memory cell, a first insulating layer is formed over a semiconductor substrate. A second insulating layer is formed over the first insulating layer. A layer of gate material is formed over the second insulating layer and patterned to leave a gate portion. The second insulating layer is etched to undercut the gate portion and leave a portion of the second insulating layer between the first insulating layer and the gate portion. Nanocrystals are formed on the first insulating layer. A first portion of the nanocrystals is under the gate portion on a first side of the portion of the second insulating layer and a second portion of the nanocrystals is under the gate portion on a second side of the portion of the second insulating layer. The first and second portions of the nanocrystals are for storing logic states of first and second bits, respectively.
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patent: 7446371 (2008-11-01), Kim
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Lek, Chun Meng et al.; Impact of decoupled plasma nitridation of ultra-thin gate oxide on the performance of p-channel MOSFETs; Semiconductor Science Technology 17; 2002; pp. 1.25-1.28; Semiconductor Science and Technology, Institute of Physics Publishing.
Muralidhar Ramachandran
Rao Rajesh A.
Clingan, Jr. James L.
Freescale Semiconductor Inc.
King Robert L.
Vu David
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