Method of forming a multi-bit nonvolatile memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

Other Related Categories

C257S317000, C257SE29300

Type

Reexamination Certificate

Status

active

Patent number

07579238

Description

ABSTRACT:
In making a multi-bit memory cell, a first insulating layer is formed over a semiconductor substrate. A second insulating layer is formed over the first insulating layer. A layer of gate material is formed over the second insulating layer and patterned to leave a gate portion. The second insulating layer is etched to undercut the gate portion and leave a portion of the second insulating layer between the first insulating layer and the gate portion. Nanocrystals are formed on the first insulating layer. A first portion of the nanocrystals is under the gate portion on a first side of the portion of the second insulating layer and a second portion of the nanocrystals is under the gate portion on a second side of the portion of the second insulating layer. The first and second portions of the nanocrystals are for storing logic states of first and second bits, respectively.

REFERENCES:
patent: 6855979 (2005-02-01), Sadd et al.
patent: 6958265 (2005-10-01), Steimle et al.
patent: 7446371 (2008-11-01), Kim
patent: 2004/0185621 (2004-09-01), Sadd et al.
Lek, Chun Meng et al.; Impact of decoupled plasma nitridation of ultra-thin gate oxide on the performance of p-channel MOSFETs; Semiconductor Science Technology 17; 2002; pp. 1.25-1.28; Semiconductor Science and Technology, Institute of Physics Publishing.

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