High K stack for non-volatile memory

Details High K stack for non-volatile memory High K stack for non-volatile memory

2005-03-23

2009-02-17

Nguyen, Dao H (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S315000, C257S316000, C257S635000, C257SE21208, C257SE21209, C438S257000, C438S258000

Reexamination Certificate

active

07492001

ABSTRACT:
A memory device may include a source region and a drain region formed in a substrate and a channel region formed in the substrate between the source and drain regions. The memory device may further include a first oxide layer formed over the channel region, the first oxide layer having a first dielectric constant, and a charge storage layer formed upon the first oxide layer. The memory device may further include a second oxide layer formed upon the charge storage layer, a layer of dielectric material formed upon the second oxide layer, the dielectric material having a second dielectric constant that is greater than the first dielectric constant, and a gate electrode formed upon the layer of dielectric material.

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Co-pending U.S. Appl. No. 11/008,233, filed Dec. 10, 2004; entitled: “Memory Cell Having Enhanced High-K Dielectric”, by Joong Jeon et al., 30 pages.
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