Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-11-21
2009-10-27
Richards, N Drew (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S103000, C438S685000, C438S687000, C438S178000, C438S396000, C257S167000, C257S245000, C257S250000, C257S306000, C257S532000
Reexamination Certificate
active
07608503
ABSTRACT:
A method of forming a memory cell comprises forming a stack comprising a first electrode, an insulating layer over the first electrode, and a second electrode over the insulating layer, with a side wall on the stack. A side wall spacer comprising a programmable resistive material in electrical communication with the first and second electrodes is formed. The side wall spacer is formed by depositing a layer of programmable resistive material over the side wall of the stack, anisotropically etching the layer of programmable resistive material to remove it in areas away from the side wall, and selectively etching the programmable resistive material according to a pattern to define the width of the side wall spacer. In embodiments described herein, the width is about 40 nanometers or less.
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Chen Shih-Hung
Chen Yi-Chou
Lung Hsiang Lan
Garcia Joannie A
Haynes Beffel & Wolfeld LLP
Macronix International Co. Ltd.
Richards N Drew
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