Method for forming shallow trench isolation in semiconductor...

Details Method for forming shallow trench isolation in semiconductor... Method for forming shallow trench isolation in semiconductor...

2005-12-29

2009-11-03

Sarkar, Asok K (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21545, C438S428000, C438S359000

Reexamination Certificate

active

07611950

ABSTRACT:
A method for forming shallow trench isolation in a semiconductor device. The method includes forming a pad oxide and a pad nitride on a semiconductor substrate in successive order, forming a trench in the substrate by etching the pad nitride, the pad oxide and the substrate, removing a portion of the pad oxide to expose top corners of the trench, and rounding the exposed portion of the top corners of the trench by a wet chemical etch.

REFERENCES:
patent: 5578518 (1996-11-01), Koike et al.
patent: 6368941 (2002-04-01), Chen et al.
patent: 6426271 (2002-07-01), Chen et al.
patent: 6589854 (2003-07-01), Liu et al.
patent: 2005/1025029 (2005-11-01), Jung

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