Method for manufacturing semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S258000, C257SE21689

Reexamination Certificate

active

07541236

ABSTRACT:
On a surface of a Si substrate, a nonvolatile memory cell, an nMOS transistor, and a pMOS transistor are formed, and thereafter an interlayer insulation film covering the nonvolatile memory cell, the nMOS transistor, and the pMOS transistor is formed. Next, in the interlayer insulation film, there are formed plural contact plugs connected respectively to a control gate of the nonvolatile memory cell, a source or a drain of the nMOS transistor, and a source or a drain of the PMOS transistor. Thereafter, there is formed a single-layer wiring connecting the control gate to the sources or drains of the nMOS transistor and the pMOS transistor via the plural contact plugs.

REFERENCES:
patent: 4646425 (1987-03-01), Owens et al.
patent: 5292681 (1994-03-01), Lee et al.
patent: 5329228 (1994-07-01), Comeau
patent: 7202540 (2007-04-01), Komori et al.
patent: 2005/0230714 (2005-10-01), Komori et al.
patent: 2007/0114617 (2007-05-01), Komori et al.
patent: 2007/0117303 (2007-05-01), Komori et al.
patent: 5-504442 (1993-07-01), None
patent: 05-315922 (1993-11-01), None
patent: 10-32255 (1998-02-01), None
patent: 2001-015718 (2001-01-01), None
patent: 2004-95910 (2004-03-01), None
Patent Abstracts of Japan Publication No. 07183502 dated Jul. 21, 1995.
Patent Abstracts of Japan Publication No. 2002043446 dated Feb. 8, 2002.
Japanese Office Action dated Jul. 1, 2008 issued in corresponding Application No. 2004-198888.
Japanese Office Action dated Jul. 6, 2009 issued in corresponding Application No. 2004-198888.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for manufacturing semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing semiconductor device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4084210

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.