Semiconductor device including bipolar junction transistor...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S234000, C257SE27032

Reexamination Certificate

active

07569448

ABSTRACT:
A method of manufacturing a CMOS-BJT semiconductor device comprises the steps of: forming a collector region of a first conductivity type and a first well of the first conductivity type, simultaneously in a semiconductor substrate; forming a second well of a second conductivity type opposite to said first conductivity type, in the semiconductor substrate; forming a base region of the second conductivity type in the collector region; forming first and second insulated gate structure on said first and second wells, and a junction protection structure having same constituent elements as said insulated gate structures on said base region; and forming second source/drain regions of the first conductivity type in said second well, and an emitter region of the first conductivity type in the base region, simultaneously, with an emitter-base junction reaching the principal surface below said junction protection structure.

REFERENCES:
patent: 6215160 (2001-04-01), Suda et al.
patent: 2003/0085414 (2003-05-01), Okuno et al.
patent: 2003/0155614 (2003-08-01), Kaneko et al.
patent: 2005/0098834 (2005-05-01), Zheng et al.
patent: 2006/0223257 (2006-10-01), Williams et al.
patent: 62-086752 (1987-04-01), None
patent: 1998-074222 (1998-11-01), None
Hitosho Okamura, et al.., “BiCMOS Embedded Gate Array QB-8E,” NEC, vol. 49, No. 3, 1996.

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