Semiconductor device, SRAM and manufacturing method of...

Details Semiconductor device, SRAM and manufacturing method of... Semiconductor device, SRAM and manufacturing method of...

2005-10-17

2009-10-06

Parker, Kenneth A (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S202000, C257S206000, C257S347000, C257S351000, C257SE27098

Reexamination Certificate

active

07598570

ABSTRACT:
A semiconductor device according to the present invention is provided with an SOI substrate, an active region, a first insulating film (complete separation insulating film), a second insulating film (partial separation insulating film), and a contact portion. Here, the active region is formed within the surface of the SOI layer. In addition, the first insulating film is formed on one side of the active region from the surface of SOI layer to the buried insulating film. In addition, the second insulating film is formed on the other side of the active region from the surface of SOI layer to a predetermined depth that does not reach the buried insulating film. In addition, the contact portion is provided toward the side where the first insulating film exists, off the center of the active region in a plan view.

REFERENCES:
patent: 6787855 (2004-09-01), Hirano et al.
patent: 7271454 (2007-09-01), Hirano et al.
patent: 2002/0112137 (2002-08-01), Houston
Mukesh Khare, et al., “A High Performance 90nm SOI Technology with 0.992 μm26T-SRAM Cell”, 2002 IEEE.
Y. Hirano, et al., “Bulk-Layout-Compatible 0.18 μm SOI-CMOS Technology Using Body-Fixed Partial Trench Isolation (PTI)”, 1999 IEEE International SOI Conference, Oct. 1999, pp. 131-132.

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