Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2008-02-29
2009-08-04
Ha, Nathan W (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE27081
Reexamination Certificate
active
07569893
ABSTRACT:
A method includes preparing a semiconductor substrate having a cell region, a core NMOS region, and a core PMOS region; defining a cell active region, an NMOS active region, and a PMOS active region in the cell region, the core NMOS region, and the core PMOS region, respectively, by forming an isolation layer in predetermined regions of the semiconductor substrate; forming a cell gate pattern, an NMOS gate pattern, and a PMOS gate pattern crossing the cell active region, the NMOS active region, and the PMOS active region, respectively; forming an interlayer-insulating layer on the semiconductor substrate having the gate patterns; simultaneously forming a storage node landing pad, a bit line landing pad, and NMOS landing pads; and patterning the interlayer-insulating layer of the core PMOS region to form PMOS interconnection contact holes that expose predetermined regions of the PMOS active region adjacent to the PMOS gate pattern.
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English language translation of Japanese Publication No. 11-186522.
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Ha Nathan W
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
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