Non-volatile memory cell structure with charge trapping...

Details Non-volatile memory cell structure with charge trapping... Non-volatile memory cell structure with charge trapping...

2005-06-24

2008-11-04

Wojciechowicz, Edward (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S317000, C257S322000, C257S401000

Reexamination Certificate

active

07446371

ABSTRACT:
In a non-volatile memory device and a method for forming such a device, at least one edge of the charge trapping layer is recessed. In this manner, the threshold voltage of the device during a programming operation and the threshold voltage of the device during an erase operation are maintained at an appropriate and consistent level. As a result, device characteristics are improved.

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Lusky, Eli, et al. “Characterization of Channel Hot Electron Injection by the Subthreshold Slope of NROM Device,” IEEE Electron Device Letters, vol. 22, No. 11, Nov. 2001.

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