Semiconductor memory device and method of supplying wordline...

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

Reexamination Certificate

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C365S189110, C365S230060

Reexamination Certificate

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07447084

ABSTRACT:
A semiconductor memory device that includes a memory cell connected to a wordline and a wordline voltage generator. The wordline voltage generator supplies a first negative voltage to the wordline in a standby state and supplies a second negative voltage that is lower with respect to ground than the first negative voltage to the wordline in a refresh operation. Accordingly, a leakage current generated at a transistor of a memory cell by gate-induced drain leakage (GIDL) is suppressed to enhance the performance of a refresh operation.

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patent: 7009904 (2006-03-01), Kim
patent: 2003/0103403 (2003-06-01), Tsujino
patent: 1999-013050 (1999-02-01), None
Minchen Chang, et al. “Impact of Gate-Induced Drain Leakage on Retention Time Distribution of 256 Mbit Dram with Negative Wordline Bias” pp. 1036-1041, IEEE Transactions on Electron Devices. vol. 50, No. 4, Apr. 2003.

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