Method and device for the sampling of digital data in...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses

Reexamination Certificate

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Details

C713S401000, C713S500000, C713S501000, C713S502000, C713S503000, C713S600000, C713S601000

Reexamination Certificate

active

07444533

ABSTRACT:
The method is applicable to the reception of data in the case of a digital transmission in which the pieces of data are transmitted by a unit of equipment A to a unit of equipment B with an accompanying clock signal HA. This accompanying clock signal transmitted by the transmitter equipment A is used by the receiver equipment B to sample the transmitted data. An alternation is effected at the receiver equipment B between a phase of operation during which the clock signal HA accompanying the data is replaced by a local clock signal HLS of the same frequency and a phase of operation during which the local clock signal is periodically re-synchronized with the accompanying clock signal. Means to implement the method are also disclosed. The method makes it possible especially to maintain the integrity of the transmission as long as possible if the data-accompanying clock signal undergoes transient variations of frequency causing de-synchronization between the received data and the accompanying clock signal and a consequent loss of data.

REFERENCES:
patent: 4972442 (1990-11-01), Steierman
patent: 6181175 (2001-01-01), Wolf
patent: 6415325 (2002-07-01), Morrien
patent: 2005/0259754 (2005-11-01), Ho et al.

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