Method of forming floating gate array of flash memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S265000, C257S315000, C257SE21682, C257SE27103

Reexamination Certificate

active

07413953

ABSTRACT:
The method of forming a floating gate array of a flash memory device includes: (a) sequentially forming a tunnel oxide film, a floating gate forming film, a capping oxide film and a first nitride film on a semiconductor substrate with an active device region defined by device isolation films; (b) patterning the first nitride film to form a first nitride film pattern; (c) forming first oxide film spacers on sidewalls of the first nitride film pattern; (d) selectively removing the first nitride film pattern; (e) forming a plurality of second nitride film patterns separated by the first oxide film spacers on the capping oxide film; (f) selectively removing the first oxide film spacers interposed between the plurality of second nitride film patterns and a portion of the capping oxide film to expose a surface of the floating gate forming film between the second nitride film patterns; (g) forming a plurality of floating gate patterns by removing a portion of the floating gate forming film exposed using the second nitride film patterns as an etching mask; and (h) oxidizing the sidewall of each of the plurality of floating gate patterns to form sidewall oxide films therebetween.

REFERENCES:
patent: 5328810 (1994-07-01), Lowrey et al.
patent: 6063688 (2000-05-01), Doyle et al.
patent: 6342451 (2002-01-01), Ahn
patent: 6893972 (2005-05-01), Rottstegge et al.
patent: 2006/0211260 (2006-09-01), Tran et al.

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