Fabrication method of a dynamic random access memory

Details Fabrication method of a dynamic random access memory Fabrication method of a dynamic random access memory

2006-08-11

2008-10-14

Dang, Phuc T (Department: 2892)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S234000, C438S235000, C257S066000, C257S301000

Reexamination Certificate

active

07435643

ABSTRACT:
A dynamic random access memory (DRAM) cell is described, including a semiconductor pillar on a substrate, a capacitor on a lower portion of a sidewall of the pillar, and a vertical transistor on an upper portion of the sidewall of the pillar. The capacitor includes a first plate in the lower portion of the sidewall of the pillar, a second plate as an upper electrode at the periphery of the first plate, a third plate at the periphery of the second plate electrically connected with the first plate to form a lower electrode, and a dielectric layer separating the second plate from the first and third plates. A DRAM array based on the DRAM cell and a method for fabricating the DRAM array are also described.

REFERENCES:
patent: 5382816 (1995-01-01), Mitsui
patent: 6077745 (2000-06-01), Burns et al.

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