Transistor for memory device and method for manufacturing...

Details Transistor for memory device and method for manufacturing... Transistor for memory device and method for manufacturing...

2007-11-08

2008-08-19

Sefer, Ahmed (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S284000, C438S585000, C257S401000, C257S411000, C257S412000, C257S413000, C257SE21442, C257SE21703, C257SE29275, C257SE29279

Reexamination Certificate

active

07413955

ABSTRACT:
Disclosed is a transistor for a memory device realizing both a step-gated asymmetry transistor and a fin transistor in a cell and a method for manufacturing the same. The transistor has an active region protruding from a predetermined region of a substrate and a groove formed in the active region. A field oxide layer is formed on the substrate around the active region in such a manner that it has a surface lower than the upper surface of the active region including the groove. A pair of gates are placed along one and the other ends of groove across the upper surface of the active region while overlapping the stepped portion of the active region. The transistor has the structure of a step-gated asymmetry transistor when seen in a sectional view taken in a first direction, as well as that of a fin transistor when seen in a sectional view taken in a second direction, which is perpendicular to the first direction. The transistor having such a structure can secure improved data retention time of the step-gated asymmetry transistor and excellent current driving properties of the fin transistor and is applicable not only to a logic device, but also to a memory device (for example, DRAM) requiring low-power and high-speed properties.

REFERENCES:
patent: 4979014 (1990-12-01), Hieda et al.
patent: 2006/0003268 (2006-01-01), Hong et al.

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