Spatial light modulator with four transistor electrode driver

Details Spatial light modulator with four transistor electrode driver Spatial light modulator with four transistor electrode driver

2005-11-16

2008-10-28

Elms, Richard (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

Reexamination Certificate

active

07443716

ABSTRACT:
A memory cell for driving a complementary pair of electrodes associated with a micro-mirror of a spatial light modulator. The memory cell includes a first PMOS transistor, wherein a source of the first PMOS transistor is coupled to a first supply voltage. The memory cell also includes a first NMOS transistor, wherein a drain of the first NMOS transistor is coupled to a drain of the first PMOS transistor, a source of the first NMOS transistor is coupled to a second supply voltage, and a gate of the first NMOS transistor is coupled to a gate of the first PMOS transistor. The memory cell further includes a second transistor adapted to establish a conduction path between the gate of the first NMOS transistor and at least one of the first supply voltage or the second supply voltage. Moreover, the memory includes a select transistor, wherein a drain of the select transistor is coupled to the gate of the first NMOS transistor and wherein the memory cell is free from a connection to a fifth transistor.

REFERENCES:
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patent: 6731533 (2004-05-01), Deng et al.
patent: 2006/0198181 (2006-09-01), Luk et al.
Urano, M. Ishii, H. Tanabe, Y. Shimamura, T. Sakata, T. Kamei, T. Kudou, K. Yano, M. Machida, K., “Novel fabrication process and structure of a low-voltage-operation micromirror array for optical MEMS switches”, Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International, Dec. 8-10, 2003, pp. 39.5.1-39.5.4.

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