Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2001-08-03
2008-09-09
Chung, Phung M (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S734000
Reexamination Certificate
active
07424657
ABSTRACT:
A method and a device for testing an integrated circuit are defined by the fact that the testing of the integrated circuit is begun by a self-test device contained in the integrated circuit before the integrated circuit is connected to an external testing device that reads out and/or evaluates the results of the self test. The integrated circuit and the wafer are constructed in such a way that this is readily possible with little outlay. An integrated circuit that includes the self-test device and a wafer including such integrated circuits is also disclosed.
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Chung Phung M
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Stemer Werner H.
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