Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2004-11-30
2008-09-02
Song, Jasmine (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S168000, C711S169000, C365S189040, C365S189050
Reexamination Certificate
active
07421557
ABSTRACT:
Method and device for reading data from a semiconductor device, where tR is a read operation time, tT is a buffer transfer time, and tH is a host transfer time, where at least two of tR, tT, and tH may be overlapped to reduce a total transfer time.
REFERENCES:
patent: 5822245 (1998-10-01), Gupta et al.
patent: 6434042 (2002-08-01), Lee et al.
patent: 6717857 (2004-04-01), Byeon et al.
patent: 6871257 (2005-03-01), Conley et al.
patent: 2003/0076719 (2003-04-01), Byeon et al.
patent: 2003/0117856 (2003-06-01), Lee et al.
patent: 2003/0174539 (2003-09-01), Byeon et al.
patent: 2003/0202383 (2003-10-01), Shiota et al.
patent: 11-145429 (1999-05-01), None
patent: 11-154393 (1999-06-01), None
patent: 2002-43444 (2002-02-01), None
patent: 2003-0033679 (2003-05-01), None
Hwang Sang-Won
Lee Jin-Yub
Harness & Dickey & Pierce P.L.C.
Samsung Electronics Co,. Ltd.
Song Jasmine
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