Method for manufacturing semiconductor device

Details Method for manufacturing semiconductor device Method for manufacturing semiconductor device

2005-05-31

2008-07-08

Toledo, Fernando L. (Department: 2823)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Multiple layers

C438S283000, C438S289000, C438S787000, C257SE21705, C257SE21598, C257SE21532

Reexamination Certificate

active

07396775

ABSTRACT:
The present invention discloses improved method for manufacturing semiconductor device wherein the gate oxide films in the cell region, VPPperipheral circuit region and VDDperipheral circuit region are formed to have different thicknesses from one another so that the threshold voltage of the cell transistor may be increased to a desired value as well as increasing the operation speed of the transistor and suppress the short channel effect.

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C.H. Lee et al., “Novel Body Tied FinFET Cell Array Transistor DRAM with Negative Word Line Operation for sub 60nm Technology and beyond”, 2004 Symposium on VLSI Technology Digest of Technical Papers, pp. 130-131.

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