Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2004-07-23
2008-03-04
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S500000, C713S503000, C713S600000, C713S601000, C700S090000, C375S354000, C375S356000, C345S182000, C326S093000
Reexamination Certificate
active
07340631
ABSTRACT:
A drift-tolerant sync generation circuit and sync generation method for a sync pulse generator operable in a clock synchronizer that effectuates data transfer between first circuitry disposed in a first clock domain and second circuitry disposed in a second clock domain. The first clock domain is operable with a first clock signal and the second clock domain is operable with a second clock signal. A sync circuit portion, responsive to a valid edge signal indicative of coincident edges between the first and second clock signals, is operable to generate based upon the ratio a start sync signal substantially centered around the coincident edges. A first sync generator, responsive to the start sync signal, is operable to generate synchronization pulses in the first clock domain. A second sync generator, responsive to the start sync signal, is operable to generate synchronization pulses in the second clock domain.
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GB Search Report dated Oct. 14, 2005.
Hewlett--Packard Development Company, L.P.
Perveen Rehana
Sugent James F.
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