Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2008-05-13
2008-05-13
Louis-Jacques, Jacques (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C324S1540PB, C324S765010, C324S763010, C324S073100, C324S755090, C714S724000, C714S726000, C714S736000, C714S733000
Reexamination Certificate
active
11176300
ABSTRACT:
A semiconductor testing apparatus, includes a test signal generating unit that generates a test signal corresponding to a test pattern to output the generated test signal to a device under test (DUT); a comparison signal generating unit that generates a comparison signal by combining a reference signal and the test signal; and a comparing unit that compares a response signal, which is output from the DUT in response to the input of the test signal, and the reference signal by offsetting the test signal contained in a composite signal of the test signal and the response signal and the test signal contained in the comparison signal. The DUT is determined to be defective or not based on a result of comparison by the comparing unit.
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Advantest Corporation
Louis-Jacques Jacques
Merant Guerrier
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