Method and apparatus of interleaving memory bank in...

Details Method and apparatus of interleaving memory bank in... Method and apparatus of interleaving memory bank in...

2008-05-13

2008-05-13

Song, Jasmine (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S005000, C711S157000, C710S110000

Reexamination Certificate

active

11052773

ABSTRACT:
A method and apparatus of interleaving memory banks in a multi-layer bus system. The apparatus includes a plurality of slave interface units receiving signals requesting a bus access and generating control signals, and a controller receiving the control signals generated from the plurality of slave interface units and generating signals required to access the memory banks. Accordingly, it is possible to greatly reduce a delay time caused when accessing a synchronous dynamic random access memory (SDRAM), for example, in a multi-layer bus system.

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AMBA Specification, Rev 2.0, ARM, May 13, 1999, pp. 3-1 to 3-57.

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