Semiconductor device having a graded LDD region and...

Details Semiconductor device having a graded LDD region and... Semiconductor device having a graded LDD region and...

2008-05-06

2008-05-06

Chen, Jack (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S305000

Reexamination Certificate

active

11021056

ABSTRACT:
A semiconductor device and fabricating method thereof in which a lightly doped drain junction is graded using a diffusion property of dopant implanted in heavily doped source/drain region are disclosed. An example semiconductor device includes a gate electrode having a gate insulating layer underneath and disposed on a semiconductor substrate; a pair of lightly doped regions separated from each other in the semiconductor substrate and aligned with the gate electrode; a pair of heavily doped regions separated from each other in the semiconductor substrate and partially overlapped with the pair of the lightly doped regions, respectively; and a pair of diffusion source/drain regions enclosing the pair of the lightly doped regions therein.

REFERENCES:
patent: 6180464 (2001-01-01), Krivokapic et al.
patent: 6300662 (2001-10-01), Doyle et al.
patent: 6693001 (2004-02-01), Hashimoto et al.
patent: 2002-353449 (2002-12-01), None

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