LSI device having scan separators provided in number reduced...

Details LSI device having scan separators provided in number reduced... LSI device having scan separators provided in number reduced...

2008-05-13

2008-05-13

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S030000, C714S724000, C714S727000, C714S729000

Reexamination Certificate

active

11305211

ABSTRACT:
A scan separator in a large scale integration device is made more extensive to suppress an increase in the circuit scale of the entire device. In one embodiment, a scan separator is provided for every two signal lines interconnecting two combinatorial circuit blocks. Each scan separator includes a selector and a flip flop for constituting a scan path. Another selector is provided for selecting one of the two signal lines. As an input selector signal for the selector that selects one of the two signal lines, data for switching controlling are used, which are transferred from a test input terminal over the scan path and latched by the flip flop. The data for switching controlling are initially transferred over the scan path to each flip flop. The selector that selects one of the two signal lines is switched in accordance with the switching controlling data stored in the flip flop. The switching controlling data may be interchanged to select the either of the two signal lines.

REFERENCES:
patent: 5477545 (1995-12-01), Huang
patent: 5592493 (1997-01-01), Crouch et al.
patent: 5889788 (1999-03-01), Pressly et al.
patent: 6374380 (2002-04-01), Sim
patent: 7051254 (2006-05-01), Sugimoto
patent: 2002/0184582 (2002-12-01), Pouya et al.
patent: 2004/0197941 (2004-10-01), Takeoka et al.
patent: 2002-296323 (2002-10-01), None

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