General protection of an integrated circuit against permant...

Details General protection of an integrated circuit against permant... General protection of an integrated circuit against permant...

2007-10-30

2007-10-30

Purvis, Sue (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S200000, C438S202000, C438S205000, C438S309000, C361S100000, C257S122000, C257S173000, C257S358000, C257S379000, C257SE21001

Reexamination Certificate

active

09790504

ABSTRACT:
In an integrated circuit, a diode is interposed between the semiconductor substrate and the contact pad to an external bias voltage, and the substrate is biased at an internal voltage reference. Between each contact pad of the integrated circuit and semiconductor substrate, there is positioned a protection device against permanent overloads and a protection device against electrostatic discharges. By isolating the semiconductor substrate from the external voltages source and by placing a protection device between each contact pad and the substrate, a broad, general protection of the integrated circuit is obtained against all the destructive phenomena such as overloads, positive and negative overvoltages, polarity reversal and electrostatic discharges.

REFERENCES:
patent: 4922371 (1990-05-01), Gray et al.
patent: 4939616 (1990-07-01), Rountree
patent: 5272371 (1993-12-01), Bishop et al.
patent: 5465190 (1995-11-01), Meunier et al.
patent: 5508548 (1996-04-01), Tailliet
patent: 5513060 (1996-04-01), Bremond
patent: 5515225 (1996-05-01), Gens et al.
patent: 5657195 (1997-08-01), Rault
patent: 61211715 (1986-09-01), None

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