Memory devices and methods of operation thereof using...

Details Memory devices and methods of operation thereof using... Memory devices and methods of operation thereof using...

2007-10-30

2007-10-30

Hur, J. H. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S207000, C365S233100, C365S189020, C365S185210

Reexamination Certificate

active

11327877

ABSTRACT:
A memory device includes a control circuit configured to disable a local input/output line sense amplifier responsive to a global input/output line sense amplifier enable signal. The device may further include a column select gate configured to control transfer of data from a memory cell to the local input/output line and the control circuit may be configured to disable transfer of data via the column select gate responsive to the global input/output line sense amplifier enable signal.

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patent: 2006/0028888 (2006-02-01), Shin et al.

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