Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-02-20
2007-02-20
Lindsay, Jr., Walter (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S622000, C438S623000, C438S624000, C438S627000, C438S629000, C438S634000, C438S636000, C438S637000, C438S638000, C438S643000, C438S648000, C438S653000, C438S656000, C438S666000, C438S672000, C438S675000, C438S685000, C438S687000, C438S700000, C257SE21577, C257SE21579, C257SE21585
Reexamination Certificate
active
10893632
ABSTRACT:
An interconnection structure and a fabrication method thereof. A first organic low-k material layer, a stress redistribution layer, a second organic low-k dielectric layer are formed in sequence over a substrate, followed by forming an opening in the first organic low-k material layer, the stress redistribution layer, and the second organic low-k dielectric layer. The opening is then filled with a conductive material to form an interconnection structure. The stress redistribution layer has a heat expansion coefficient closer to that of the substrate, while such heat expansion coefficient differs more significantly from those of the first and second organic low-k material layers.
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Chen Jen-Kon
Hsiung Chiung-Sheng
Yang Chih-Chao
Yang Gwo-Shil
Yeh Ming-Shih
Ahmadi Mohsen
Lindsay, Jr. Walter
Patents J. C.
United Microelectronics Corp.
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