Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-11-13
2007-11-13
Nguyen, Thanh (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C257SE29260
Reexamination Certificate
active
10941276
ABSTRACT:
A method of fabricating an MOS device is described. A substrate doped a first type dopant is provided as a drain. A first type epitaxial layer is formed on the substrate and is patterned with a trench to form several islands. A gate dielectric layer is than formed on the surface of the trench, and a gate is formed in the trench covering the gate dielectric layer. A second type dopant is doped into the islands with the doping concentration decreasing gradually from the bottom to the top of the islands. Afterwards, a source is formed at the top of the islands. Accordingly, the doping concentration in the islands decreases gradually from the drain to the source with the highest doping concentration near the drain. Therefore, the width of the depletion region can be reduced, and the length of the device channel can be reduced for lowering channel resistance and gate capacitance.
REFERENCES:
patent: 5532179 (1996-07-01), Chang et al.
patent: 6534828 (2003-03-01), Kocon
patent: 7161208 (2007-01-01), Spring et al.
patent: 2005/0167695 (2005-08-01), Yilmaz
Episil Technologies Inc.
J.C. Patents
Nguyen Thanh
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