Semiconductor memory device having N-bit prefetch type and...

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S204000, C365S149000, C365S239000, C365S189050

Reexamination Certificate

active

11148231

ABSTRACT:
A semiconductor memory device in which only global I/O buses, which receive one or more data groups that must be output first among a N number of data groups that are prefetched in a N-bit prefetch type, from an array of memory cells are precharged with a ½ power supply voltage, thereby making the output speed of the data groups that must be output first thing faster than that of the remaining data groups. The semiconductor memory device includes a data bus controller for precharging predetermined data buses that receive one or more data group that must be output to the outside first among a N number of data groups that are prefetched in a N-bit prefetch type from an array of memory cells, using information to decide an I/O sequence of the N number of the data groups.

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