MIM capacitor structure and method of manufacture

Details MIM capacitor structure and method of manufacture MIM capacitor structure and method of manufacture

2007-10-16

2007-10-16

Andujar, Leonardo (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S213000, C257S288000, C257S296000, C257SE27081

Reexamination Certificate

active

10689294

ABSTRACT:
A metal-insulator-metal (MIM) capacitor structure and method of manufacturing thereof. A plurality of MIM capacitor patterns is formed in two or more insulating layers. The insulating layers may comprise a via layer and a metallization layer of a semiconductor device. A top portion of the top insulating layer is recessed in a region between at least two adjacent MIM capacitor patterns. When the top plate material of the MIM capacitors is deposited, the top plate material fills the recessed area of the top insulating layer between the adjacent MIM capacitor pattern, forming a connecting region that couples together the top plates of the adjacent MIM capacitors. A portion of the MIM capacitor bottom electrode may be formed in a first metallization layer of the semiconductor device.

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Liu, et al., Single Mask Metal-Insulator-Metal (MIM) Capacitor with Copper Damascene Metallization for Sub-0.18 μm Mixed Mode Signal and System-on-a-Chip (SoC) Applications, 2000, Lucent Technologies Bell Laboratories, Murray Hill, NJ, US.
Ishikawa, et al., High-Capacitance Cu/Ta2O5/Cu MIM Structure for SoC Applications Featuring a Single-Mask Add-on Process, 2002, Central Research Laboratory, Kokubunji, Tokyo, Japan.

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