Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-12-11
2007-12-11
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
11015983
ABSTRACT:
A method and an apparatus to improve hierarchical design implementation have been disclosed. In one embodiment, the method includes deriving boundary logic of at least one of a plurality of partitions in an integrated circuit (IC) design, marking the boundary logic of the at least one of the plurality of partitions based on at least one predetermined criterion, and performing implementation of the IC design using the marked boundary logic.
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Alford William E.
Cadence Design Systems Inc.
Kik Phallaka
Orion Law Group, Plc.
Wong Chui-Kui Teresa
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