Semiconductor integrated circuit device

Details Semiconductor integrated circuit device Semiconductor integrated circuit device

2007-08-14

2007-08-14

Tran, Michael (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S196000

Reexamination Certificate

active

11598702

ABSTRACT:
There is achieved a high-integrated and high-speed nonvolatile memory which can stabilize an operation of a phase-change memory for a short operation cycle time. A latch is provided in a write driver. A change to a high-resistance state of a phase-change element is performed per column cycle by a write-enable signal, and a change to a low-resistance state thereof is performed after a pre-charge command is inputted and concurrently with deactivation of a pre-charge signal. Thereby, a write time to a memory cell in which phase-change resistance is changed to a low-resistance state, and a period from a write operation for changing the phase-change resistance to a high-resistance state to a read operation to the above memory cell can be lengthened without extending the column cycle time, so that the stable write operation is achieved.

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Y. Hwang et al., “Completely CMOS-Compatible Phase-Change Nonvolatile RAM using NMOS Cell Transistors”, Nonvolatile Semiconductor Memory Workshop, Digest of Technical Papers, 2003, pp. 91-92.

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