Method of manufacturing recess type MOS transistor having a...

Details Method of manufacturing recess type MOS transistor having a... Method of manufacturing recess type MOS transistor having a...

2007-11-27

2007-11-27

Smoot, Stephen W. (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S286000, C438S306000, C438S589000, C257SE21618

Reexamination Certificate

active

11022056

ABSTRACT:
The method of manufacturing a recess type MOS transistor improves a refresh characteristic. In the method, a channel impurity region is formed by ion implanting a first conductive impurity in an active region of a semiconductor substrate. Thereon, a second conductive impurity and the first conductive impurity are ion-implanted each alternately into the active region, to thus sequentially form first to third impurity regions having a dual diode structure on the channel impurity region, the second conductive impurity having conductivity opposite to the first conductive impurity. A trench is formed, and a gate insulation layer is formed in a gate region to produce a gate stack. The first conductive impurity is selectively ion-implanted in a source region, to thus form a fourth impurity region. A spacer is then formed in a sidewall of the gate stack, and the second conductive impurity is ion-implanted in the source/drain regions, to form a fifth impurity region.

REFERENCES:
patent: 5160491 (1992-11-01), Mori
patent: 5576567 (1996-11-01), Mori
patent: 5693547 (1997-12-01), Gardner et al.
patent: 6673681 (2004-01-01), Kocon et al.
patent: 7163865 (2007-01-01), Kim
patent: 03011765 (1991-01-01), None

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