Process for fabricating pad frame and integrated circuit...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S613000, C438S614000, C438S615000, C257SE23037

Reexamination Certificate

active

11194993

ABSTRACT:
A process for fabricating a pad frame for an integrated circuit package includes building up metal on selective portions of a first side of a substrate to define a plurality of contact pads disposed in a first layer of dielectric material, depositing a metal seed layer on an exposed side of the contact pads and the dielectric material, applying a second metal layer on the metal seed layer, selectively etching the second metal layer and the metal seed layer to provide pad frame circuitry, and building up metal on selective portions of the pad frame circuitry to define a plurality of die connect pads separated by a second layer of dielectric material, the die connect pads being electrically connected to the contact pads by the pad frame circuitry.

REFERENCES:
patent: 6498099 (2002-12-01), McLellan et al.
patent: 6622907 (2003-09-01), Fanti et al.
patent: 6706622 (2004-03-01), McCormick
patent: 6933594 (2005-08-01), McLellan et al.
patent: 7012019 (2006-03-01), Hsu et al.
patent: 2002/0149118 (2002-10-01), Yamaguchi et al.
patent: 2004/0209452 (2004-10-01), Kim
patent: 2006/0027936 (2006-02-01), Mizukoshi et al.

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