Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-12-25
2007-12-25
Fourson, George R. (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S239000, C438S254000, C438S396000, C438S397000, C257SE21648, C257SE27034, C257SE27048
Reexamination Certificate
active
11360503
ABSTRACT:
Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor structure formed above the semiconductor substrate and comprising a first electrode, a second electrode provided below the first electrode, a third electrode provided below the second electrode, a first dielectric film provided between the first electrode and the second electrode, and a second dielectric film provided between the second electrode and the third electrode, an insulating film covering the capacitor structure and having a first hole reaching the first electrode, a second hole reaching the second electrode, and a third hole reaching the third electrode, a first conductive connection electrically connecting the first electrode and the third electrode and having portions buried in the first and third holes, and a second conductive connection formed separately from the first conductive connection and having a portion buried in the second hole.
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Japanese Patent Office Notification for Reasons of Rejection and English translation thereof in Japanese Patent Application No. 2002-344225.
Houng, M.P. et al., “High Capacitance Density in a Ta2O5Folded Capacitor Chip”, Jpn. J. Appl. Phys. vol. 41, Part 1, No. 3A, pp. 1311-1314, (Mar. 2002).
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Fourson George R.
Garcia Joannie Adelle
Kabushiki Kaisha Toshiba
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