Method of fabricating an embedded non-volatile memory device

Details Method of fabricating an embedded non-volatile memory device Method of fabricating an embedded non-volatile memory device

2007-02-06

2007-02-06

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S954000

Reexamination Certificate

active

11162572

ABSTRACT:
A method of fabricating a non-volatile memory based on SONOS is disclosed. By masking the peripheral circuit area with a reverse ONO photoresist layer, the residual ONO layer that is not covered by a gate within the memory array area is etched away to expose the substrate. After the etching of the ONO layer, a channel adjustment doping is carried out subsequently using the reverse ONO photoresist layer as an implant mask, thereby forming lightly doped regions next to the gate within the memory array area. Finally, the reverse ONO photoresist layer is then stripped.

REFERENCES:
patent: 5098855 (1992-03-01), Komori et al.
patent: 5175120 (1992-12-01), Lee
patent: 5550072 (1996-08-01), Cacharelis et al.
patent: 6090666 (2000-07-01), Ueda et al.
patent: 6303418 (2001-10-01), Cha et al.
patent: 6406960 (2002-06-01), Hopper et al.

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