Method of fabricating a semiconductor device having CMOS...

Details Method of fabricating a semiconductor device having CMOS... Method of fabricating a semiconductor device having CMOS...

2007-11-13

2007-11-13

Doan, Theresa (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S200000

Reexamination Certificate

active

11442288

ABSTRACT:
To reduce electric current concentration and electric field concentration in junction parts even in the case of miniaturization, and to achieve triggering at low voltage, an ESD protection apparatus is installed between an input terminal of a semiconductor integrated circuit chip and a CMOS transistor. The ESD protection apparatus includes a trigger element having diodes which are broken down by overvoltage applied to the input terminal and an ESD protection element including vertical bipolar transistors for discharging the accumulated electric charge of the input terminal by being electrically discharged owing to the breakdown of the diodes.

REFERENCES:
patent: 5043782 (1991-08-01), Avery
patent: 5272371 (1993-12-01), Bishop et al.
patent: 5276582 (1994-01-01), Merrill et al.
patent: 5326994 (1994-07-01), Giebel et al.
patent: 5471082 (1995-11-01), Maeda
patent: 5539327 (1996-07-01), Shigehara et al.
patent: 5623387 (1997-04-01), Li et al.
patent: 5648676 (1997-07-01), Iwai et al.
patent: 5731614 (1998-03-01), Ham
patent: 5774318 (1998-06-01), McClure et al.
patent: 5821797 (1998-10-01), Kinugasa et al.
patent: 61-232657 (1986-10-01), None
patent: 61-251165 (1986-11-01), None
patent: 62-242354 (1987-10-01), None
patent: 02-199868 (1990-08-01), None
patent: 02-244752 (1990-09-01), None
patent: 05-259394 (1993-10-01), None
patent: 09-213891 (1993-10-01), None
patent: 06-163841 (1994-06-01), None
patent: 06-335162 (1994-12-01), None
patent: 10-242400 (1998-09-01), None
patent: 11-168183 (1999-06-01), None
patent: 11-251533 (1999-09-01), None
patent: 1996-0014444 (1996-10-01), None
patent: 1999-30302 (1999-04-01), None
Adel S/ Sedra, Kenneth C. Smith, Microelectronic Circuits, Holt, Rinehart and Winston, 1987, pp. 408-410.

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