Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2007-01-16
2007-01-16
Elmore, Stephen C. (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S100000, C711S105000, C711S154000, C365S230010, C365S237000
Reexamination Certificate
active
10687591
ABSTRACT:
A memory controller converts controller output signals output from a controller int memory input signals according to the operation specifications of memory chips to operate, and outputs the resultant to the memory chips through a common bus. The memory controller also receives memory output signals output from the memory chips through the common bus, and converts the received signals into controller input signals receivable to the controller. This allows the single memory controller to access the plurality of types of memory chips. As a result, the memory controller can be reduced in chip size, lowering the cost of the memory system.
REFERENCES:
patent: 5804987 (1998-09-01), Ogawa et al.
patent: 5983331 (1999-11-01), Akamatsu et al.
patent: 6085317 (2000-07-01), Smith
patent: 6415348 (2002-07-01), Mergard et al.
patent: 6470433 (2002-10-01), Prouty et al.
patent: 6480947 (2002-11-01), Hasegawa et al.
patent: 2001/0011311 (2001-08-01), Takeda
patent: 2001/0054135 (2001-12-01), Matsuda
patent: 2002/0159284 (2002-10-01), Funaba et al.
patent: 2003/0070049 (2003-04-01), Suzuki
patent: 6-42263 (1994-06-01), None
Elmore Stephen C.
Fujitsu Limited
Kim Daniel
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