Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-07-03
2007-07-03
Fourson, George R. (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S240000, C438S243000, C438S244000, C438S253000, C438S386000, C438S396000
Reexamination Certificate
active
10681643
ABSTRACT:
A method of forming a one-transistor memory cell includes the steps of: forming a dielectric layer over a substrate having a pass-gate formed thereon; forming an opening in the dielectric layer to expose a portion of the substrate at least adjacent to the pass-gate; forming a capacitor dielectric layer on sidewalls of the opening in the dielectric layer and on the exposed portion of the substrate; and forming an electrode layer over the capacitor dielectric layer. A one-transistor memory cell is also disclosed. The one-transistor memory cell has a substrate having a pass-gate formed thereover. A dielectric layer is formed over the pass-gate and the substrate and has an opening exposing a portion of the substrate adjacent to the pass-gate. A capacitor dielectric layer is formed on sidewalls of the opening and on the exposed portion of the substrate. An electrode layer is formed on the capacitor dielectric layer.
REFERENCES:
patent: 4329704 (1982-05-01), Sakurai et al.
patent: 5150276 (1992-09-01), Gonzalez et al.
patent: 5501999 (1996-03-01), Park
patent: 5521111 (1996-05-01), Sato
patent: 5665624 (1997-09-01), Hong
patent: 6048738 (2000-04-01), Hsu et al.
patent: 6075720 (2000-06-01), Leung et al.
patent: 6081008 (2000-06-01), Rostoker
patent: 6130470 (2000-10-01), Selcuk
patent: 6284590 (2001-09-01), Cha et al.
patent: 6335895 (2002-01-01), Sugibayashi
patent: 6352898 (2002-03-01), Yang et al.
patent: 6420226 (2002-07-01), Chen et al.
patent: 6436762 (2002-08-01), Tzeng et al.
patent: 6720600 (2004-04-01), Okita
patent: 2001/0021122 (2001-09-01), Kurth et al.
patent: 2001/0024854 (2001-09-01), Takeuchi et al.
patent: 2002/0030211 (2002-03-01), Keeth et al.
patent: 2002/0094697 (2002-07-01), Leung et al.
patent: 2003/0042519 (2003-03-01), Tzeng et al.
patent: 2003/0116795 (2003-06-01), Joo
patent: 2003/0214872 (2003-11-01), Tu
patent: 2003/0234416 (2003-12-01), Thomas et al.
patent: 2004/0090734 (2004-05-01), Lian
patent: 2004/0191985 (2004-09-01), Tu
Duane Morris LLP
Fourson George R.
Garcia Joannie Adelle
Taiwan Semiconductor Manufacturing Company
LandOfFree
Method of forming one-transistor memory cell and structure... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming one-transistor memory cell and structure..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming one-transistor memory cell and structure... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3782263